some work

1 files changed, 94 insertions, 32 deletions

diff --git a/lab3/lab.vhd b/lab3/lab.vhd
index 22bf366..c8a1f3c 100755
--- a/lab3/lab.vhd
+++ b/lab3/lab.vhd
@@ -4,19 +4,18 @@ use IEEE.NUMERIC_STD.all;
 
 
 entity lab is
-    Port ( clk,rst, rx : in  STD_LOGIC;    -- rst är tryckknappen i mitten under displayen
+    Port ( clk, rst, rx : in  STD_LOGIC;    -- rst är tryckknappen i mitten under displayen
            seg: out  UNSIGNED(7 downto 0);
            an : out  UNSIGNED (3 downto 0));
 end lab;
 
 architecture Behavioral of lab is
-
-  component leddriver
-    Port ( clk,rst : in  STD_LOGIC;
-           seg : out  UNSIGNED(7 downto 0);
-           an : out  UNSIGNED (3 downto 0);
-           value : in  UNSIGNED (15 downto 0));
-  end component;
+    component leddriver
+        Port ( clk,rst : in  STD_LOGIC;
+               seg : out  UNSIGNED(7 downto 0);
+               an : out  UNSIGNED (3 downto 0);
+               value : in  UNSIGNED (15 downto 0));
+    end component;
 
     signal sreg : UNSIGNED(9 downto 0) := B"0_00000000_0";  -- 10 bit skiftregister
     signal tal : UNSIGNED(15 downto 0) := X"0000";
@@ -26,47 +25,110 @@ architecture Behavioral of lab is
     signal pos : UNSIGNED(1 downto 0) := "00";
 
 begin
+    -- *****************************
+    -- *  synkroniseringsvippor    *
+    -- *****************************
+    -- 1 process
+    --
+    -- Förändringarna på insignalen ska komma i takt med vår klocka.
+
+    process(clk) begin
+        if rising_edge(clk) then
+            if rst='1' then
+                rx1 <= '0';
+                rx2 <= '0';
+            else
+                rx1 <= rx;
+                rx2 <= rx1;
+            end if;
+        end if;
+    end process;
+
+
+    -- *****************************
+    -- *       styrenhet           *
+    -- *****************************
+    -- 1 eller 2 processer
+    --
+    -- Denna producerar två styrsignaler, båda enpulsade:
+    -- – Skiftpulsen sp, som kommer mitt i (ungefär) varje bit.
+    -- – Laddpulsen lp, som kommer efter den sista skiftpulsen.
 
     process(clk) begin
         if rising_edge(clk) then
             if rst='1' then
-                -- init
-            elsif false then
-                -- do the thing
+                sp <= '0';
+                lp <= '0';
+            elsif _ then
             else
-                -- do the other thing
             end if;
         end if;
     end process;
 
-  -- *****************************
-  -- *  synkroniseringsvippor    *
-  -- *****************************
+    process(clk) begin
+        if rising_edge(clk) then
+            if rst='1' then
+            elsif _ then
+            else
+            end if;
+        end if;
+    end process;
+
+
+    -- *****************************
+    -- * 10 bit skiftregister      *
+    -- *****************************
+    -- 1 process
+    --
+    -- De 10 bitarna i varje siffra skiftas in i skiftregistret.
+
+    process(clk) begin
+        if rising_edge(clk) then
+            if rst='1' then
+            elsif _ then
+            else
+            end if;
+        end if;
+    end process;
 
-  -- *****************************
-  -- *       styrenhet           *
-  -- *****************************
 
+    -- *****************************
+    -- * 2  bit räknare            *
+    -- *****************************
+    -- 1 process
 
-  -- *****************************
-  -- * 10 bit skiftregister      *
-  -- *****************************
+    process(clk) begin
+        if rising_edge(clk) then
+            if rst='1' then
+            elsif _ then
+            else
+            end if;
+        end if;
+    end process;
 
 
-  -- *****************************
-  -- * 2  bit register           *
-  -- *****************************
+    -- *****************************
+    -- * 16 bit register           *
+    -- *****************************
+    -- 1 process
+    --
+    -- ... för 4 siffror. Laddas av laddpulsen, samtidigt räknas räknaren upp.
 
 
-  -- *****************************
-  -- * 16 bit register           *
-  -- *****************************
+    process(clk) begin
+        if rising_edge(clk) then
+            if rst='1' then
+            elsif _ then
+            else
+            end if;
+        end if;
+    end process;
 
 
-  -- *****************************
-  -- * Multiplexad display       *
-  -- *****************************
-  -- Inkoppling av komponenten leddriver
-  led: leddriver port map (clk, rst, seg, an, tal);
+    -- *****************************
+    -- * Multiplexad display       *
+    -- *****************************
+    -- Inkoppling av komponenten leddriver
+    led: leddriver port map (clk, rst, seg, an, tal);
 
 end Behavioral;